#177 – Discussing Innovation and the Future with Mike Ossmann – Fiesty Festivus Futurology

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Welcome back, impromptu guest, Mike Ossmann! (Mike was a previous guest on Episode 161 talking about the HackRF)

FestivusPole

Thanks again to Mike for being on the show again. It was a great way to finish out the year. See you all in 2014!

Thanks to Matthew Keefe for the picture of the Festivus Pole!

Comments

    • Russ says

      When I did length matching in gEDA, I did something similar to what was mentioned in the show, except that gEDA PCB doesn’t have any trace properties, so I just made a text file of each group of traces along with an additional property of ticks of delay that can be added inside the fpga. A script would then read out trace length of everything in the group, calculate the average, longest trace, shortest trace, and print out some stats.

      • Evan Foss says

        My hat is off to you Russ. That is more labor than I would be prepared to invest in it.

        I have been doing analog layout for long enough to know better than to trust autorouters with anything. That said having one that can match trace length and impedance is a critical thing. For a really involved board having the ability to nudge whole buses around is a critical thing.

        For larger digital stuff with a lot of parallel routing I would want a rule based autorouter. Perhaps this is because I have never experienced one. Any comments?